This invention relates to programmable logic integrated circuits, and more particularly to programmable logic integrated circuits including spare circuits for use in replacing other possibly defectively manufactured circuits on the same chip.
As is shown by such references as Hartmann et al. U.S. Pat. No. 4,617,479; Hartmann et al. U.S. Pat. No. 4,609,986; Veenstra U.S. Pat. No. 4,677,318; Hartmann et al. U.S. Pat. No. 4,713,792; Birkner et al. U.S. Pat. No. 4,124,899; Cavlan U.S. Pat. No. 4,703,206; and Spencer U.S. Pat. No. 3,566,153, all of which are hereby incorporated by reference herein, programmable logic integrated circuits or devices ("PLDs" ) are well known. PLDs are constantly increasing in size and complexity, so that such devices are now being made with 500,000 or more transistors on a single chip. With so many circuits on a chip, there is always a chance that one or more circuits will be defectively manufactured, thereby rendering the entire chip useless. This reduces the "yield" of the chip manufacturing process and effectively increases the cost of the good chips.
In view of the foregoing, it is an object of this invention to increase the effective yield of PLD manufacturing processes.
It is another object of this invention to make it possible to salvage defectively manufactured PLD chips and convert them to usable devices, preferably so that the repaired chips are just like completely good chips and have all the characteristics, features, performance, and long-term reliability of good chips.
It is a further object of this invention to make it possible to convert defectively manufactured PLD chips to good chips in such a way that the purchaser and ultimate user of the chips is completely unaware that the chip was initially defective.
It is still another object of this invention to provide PLD architectures or circuit configurations which, even if defectively manufactured in some respects, can be reconfigured so that the defects are effectively eliminated or obviated.